P104-GPIO96

This product is supported for DSCUD 8.0 and above. For DSCUD 7.0 documentation, please refer FP-GPIO96 Universal Driver Software User Guide.pdf

Overview

P104-GPIO96 is a general purpose I/O FeaturePakTM module using a high-capacity (700K gate equivalent) PCI Express FPGA for maximum density and flexibility. The base hardware configuration features 96 digital I/O lines grouped into 12 8-bit ports. All ports have I/O buffers to protect the FPGA and offers 3.3V logic drive levels. The ports are organized into a combination of byte-wide, nibble-wide, and bit-wide direction control for maximum flexibility and application compatibility.

The built-in FPGA personality provides multiple configuration options. All 96 I/O lines may be used in common I/O mode. Six of these ports can be reconfigured to enable an array of additional features, including 8 32-bit up/down counter/timers with programmable input source and gate, 4 24-bit PWM circuits with 0-100% duty cycle capability, and interrupt/latched mode operation.

Board Initialization

To use the P104-GPIO96 board in an appllication using the UD, the dscInitBoard function should use the board macro DSC_FPGPIO96. This is shown in the example below.

dscInitBoard(DSC_FPGPIO96, &dsccb, &board );

Digital I/O

Max Ports:	12, 96 digital I/O lines grouped into 12 8-bit ports.Prometheus require direction to be set with DscDIOSetConfig () before use. All DIO lines power-up in input mode and have readback capability. All DIO lines have Configurable digital I/O pull- pull resistors that can be configured for all pull-up or all pull-down with a jumper.

P104-GPIO96 Universal Driver Functions

• dscCancelOpType()

• dscCounterConfig()

• dscCounterFunction()

• dscCounterRate()

• dscCounterRead()

• dscDIOInputBit()

• dscDIOInputByte()

• dscDIOOutputBit()

• dscDIOOutputByte()

• dscDIOSetConfig()

• dscLEDTest()

• dscPWMClear()

• dscPWMStart()

• dscUserInt()

• dscUserIntRun()