4. FUNCTIONAL OVERVIEW

This page describes the key sub-systems implemented on the Athena IV system.

4.1 Processor Module

Athena IV supports CoMEx Type 10 Mini modules. Currently, Athena IV is shipped with Bay Trail processor with the following specifications:

• E3845 1.91GHz quad core, 4GB RAM

Detailed specifications of the CPU module has been provided in Section 3 EmNANO-i230V.

Athena IV is designed to work with CoM Express Type 10 Mini Modules. Additional CPU modules can be used with Athena IV. Contact Diamond System Corp sales for more details.

4.2 Power Supply Specifications

Athena IV is powered from a regulated +5V supply. Maximum allowable reflected ripple, measured at the voltage input connector is 100mV p-p. In addition, a pin is available for users to attach +12 VDC, however this voltage is routed only to the LCD backlight connector and the PC/104 expansion bus connectors. No on-board circuit connects to +12V. The SBC is provided with ACPI power pushbutton for on/off control. All required supply voltages for the board are derived from the +5V DC input. These power supplies are sized to support the highest capacity for on board features and have enough reserve capacity to support the below add-on features:

5V	3.3V	Feature
	0.5A	M.2
2A		USB2.0Ports; 0.5 A/ per port
1A		USB3.0 Port
4A		CoM Express Module

4.3 RTC Backup Battery

Athena IV provides two options to feed power to the RTC:

1. A coin cell battery is soldered on board

2. A 2x1 input connector is provided for connecting an external backup battery

The coin cell provided on-board is BR-1632/HFN of 120mAh capacity. With this capacity, on an average current draw by the RTC, the on-board coin cell is expected to run for 2 years.

4.4 Ethernet

The board provides two 10/100/1000 Ethernet ports. The standard port comes directly from the CoM module. The second port is derived from the Intel WGI210IT PCIe Ethernet controller. This controller is accessed viax1 PCIe lane from the CoM.

Both ports have on-board magnetics. The first port is terminated on a 2x6 2.54mm pin header. The upper column of the 2x6 pin header matches with the Athena II Ethernet connector. The second Ethernet port is available on 2x5 2mm pin header.

The on-board LEDs are provided for Link, Activity, and Speed on each port. The LEDs are located along the board edge. Both connectors do not provide access to the LED signals.

4.5 Video

VGA:

Athena IV supports VGA display interface. On board DDI to VGA chip is used to convert the DDI interface from CPU module. Maximum VGA resolution supported is 2048x1152@60Hz

LVDS LCD:

Athena IV supports 24-bit single channel LVDS display through 2x15 vertical connector. Separate backlight supply connector provides LCD backlight supply and PWM control. Backlight supply is given externally through the main power input connector.

Backlight may be 12V or 5V depending upon the LCD display used & this has to be provided along with the additional 5V through the main input power connector.

4.6 Audio

The HD audio link available from the CoM is converted to Analog Audio using Audio codec ALC262. Line In, Line OUT and Mic In signals are terminated on a 2x5 2.54mm header.

4.7 USB2.0 Ports

Athena IV provides 4x USB2.0 ports routed to 2x5 2.54mm headers. A single header consists of two USB2.0 ports. Athena IV provides two such connectors on the board.

4.8 USB3.0 Port

Athena IV provides a USB3.0 port terminated on a 2x5 2mm vertical connector. This port is backward compatible to USB2.0 port.

4.9 SATA

Athena IV provides a standard 7-pin SATA port. This port can be used to connect SATA hard drives. This SATA port doesn't support SATA DOM.

4.10 M.2 SATA Socket

Athena IV provides an M.2 2230 M-Key socket for SSD storage applications.

4.11 Data Acquisition

Athena IV provides a data acquisition sub circuit containing analog input, analog output, and digital I/O features. This circuit is controlled by an FPGA attached to the CoM module via the LPC bus. A 2x25 2.54mm pin header on the board provides access to JTAG signals for reprogramming the FPGA on the board and in the field.

The data acquisition circuit is based on the Diamonds Athena III board.

The features of the DAQ include:

• 16 single-ended / 8 differential analog inputs with 16-bit resolution, programmable input ranges, and 200KHz sample rate;

• 4 analog outputs with 16-bit resolution and programmable output ranges

• 24 digital I/O in 3 8-bit ports with programmable direction and buffered outputs

• 1 External trigger Input and 1 Timer Output.

The digital I/Os on the Athena III were 3.3V O/P & 5V I/P tolerant. To meet this requirement on the Athena IV, 74LCX245MTCX transceivers are used with output enable and direction control. These are directly controlled by the FPGA. By default, transceiver direction control signals are driven to configure the DIOs as inputs with the transceiver outputs disabled.

The DIOs are also provided with pull-up/down options. By default, pull-down are connected to the DIOs. To the connect pull-up/down to the DIOs, jumper JP6 has to be appropriately mounted. Refer to Section 11.1.2 Enable the pull-up or pull-down on the DIOs for more details. A fuse is used on the DIO connector for external connections that is rated for ~100mA maximum sustained current.

Apart from programming the FPGA with the JTAG interface, the board is also provided with provisions to program the FPGA directly from the CoM via SPI interface. The SPI of the CoM is interfaced with the flash of the FPGA. However, since this flash is also used by FPGA, the data path to the SPI flash is multiplexed and can be redirected using the jumper JP9. The jumper JP9 is used to redirect the SPI of the COM from the TPM to the SPI flash and the same jumper is used to select the CS# either from the FPGA or the from COM. Jumper configuration details are provided in Section 12.6 SPI Select.

4.12 Serial Ports

Athena IV supports 4 serial ports using PCIe to Quad UART controller (XR17V354). The UARTs from the CoM are not utilized. All the 4 ports support RS232/422/485 configuration realized using SP336 transceivers. The protocol selection for Serial ports 1-4 and the termination (121 Ohm) for RS422 and RS485 protocols are controlled using jumpers & software.

Of the 4 serial ports, the ports 3 & 4 are multiplexed between XR17V354 (PCIe – UART) & XR16C2850 (ISA-UART) with 0E resistors. This is done to provide backward compatibility with Athena II/III. The ports 1 & 2 are provided by XR17V354 at all times. By default, all the 4 ports are provided by the XR17V354.

The serial ports are terminated on an 80-pin connector.

4.13 PCIe Link Routing

Athena IV utilizes 2 PCIe lanes from the CoM:

1. Lane 1 - PCIe to UART for the serial ports

2. Lane 2 - PCIe to Gigabit Ethernet controller for the second Ethernet port

4.14 PC/104

The ISA bus on Athena IV is realized using LPC to ISA IP core within a Artix 7 FPGA. This would make the ISA bus, processor independent. The ISA interface supports interrupts & 16-bit ISA transactions.

The PC/104 expansion bus enables installation of additional I/O boards. It consists of two stack-through connectors press-fit onto the board, enabling expansion both above and below the board. The board contains two stack-through / short pin 8-bit and 16-bit PC/104 connectors on the top & bottom side. Although the board has both top side and bottom side PC/104 connectors, bottom side mounting of I/O modules is preferred to avoid blocking airflow over the top-side heat sink on Athena IV.

4.15 Watch Dog Timer (WDT)

Athena IV contains a watchdog timer (WDT) circuit with programmable delay time derived from the FPGA. The WDT can be enabled, disabled, and retriggered in software. If the WDT times out before it is retriggered, it will cause a system reset. The watchdog timer circuit timeout period is programmable from 0 to 255 seconds with 1 second or better resolution.

The WDT is terminated on a 1x3 2.54mm header.

4.16 Trusted Platform Module

Athena IV provides an optional Board ID security solution from Infineon using the SLB9670XQ12FW643XUMA1. SLB9670XQ12FW643XUMA1 is interfaced to the CoM over SPI interface.

4.17 LED Indicators

Athena IV provides the following LED indicators. All LEDs are located near to board edge or their respective features. All LEDs are labeled in silkscreen with their function.

Function	Silk Screen Label	Indication
Power on	PWIN	Green LED for 5V
Power Good	PWGD	Green LED for Power Good
Ethernet	1G,100,10	Green LED for Link, activity, and speed for each port
SATA activity	SATA	Green LED for SATA activity
FPGA DONE	DONE	Green LED for FPGA DONE
User LED	USER	Blue LED driven by data acquisition FPGA

4.18 Jumpers

Athena IV consists of 9 jumpers, which aid in configuring certain functionalities. The available jumpers & their functionalities have been described in Section 12 Jumper Description.