Specifications

General Specifications

• Base FPGA: Xilinx Spartan II, 200,000 gates, 40K RAM bits

• Input clock: 40MHz

• FPGA code storage: Flash memory, field upgradeable via JTAG

• ID indicator: 8-bit LED display indicates FPGA code personality; field upgradeable via JTAG

• Counter/timers: 10, 16 bits, using 2 CTS9513 cores

• Maximum counting frequency: 40MHz

• Counter modes: Counter, rate/square-wave generator, pulse-width modulator, programmable one-shot, hardware/software triggered strobe

• Programmable I/O: 48, using 2 82C55A cores

• Fixed direction I/O: 8 fixed inputs, 8 fixed outputs

• Output current, buffered I/O: Logic 0: 64mA max per line buffered I/O; Logic 1: -15mA max per line

• Output current, fixed I/O and counter/ timers: ±24mA max

• Dimensions: 3.55" x 3.775", PC/104 form factor

• PC/104 bus: 16-bit stack through ISA bus

• Power supply: +5VDC ±5%

• Operating temperature: -40° to +85° C