28.2 Data Acquisition Section (HLV800-256AV & HLV1000-256AV Only)
Analog Inputs | |
Number of input channels | 16 single-ended or 8 differential voltage inputs (software selectable) |
Resolution | 16 bits (1/65,536 of full scale) |
Input ranges | Bipolar: ±10V, ±5V, ±2.5V, ±1.25V Unipolar: 0-10V, 0-5V, 0-2.5V, 0-1.25V |
Input bias current | 50nA max |
Maximum input voltage | ±10V for linear operation |
Over-voltage protection | ±35V on any input without damage |
Drift | ±10ppm/oC typical |
A/D conversion rate | 250,000 samples/second maximum |
Conversion trigger | Software trigger Internal pacer clock External digital signal |
FIFO | 2048 samples Programmable interrupt threshold |
Analog Outputs | |
Number of output channels | 8 voltage outputs |
D/A resolution | 12 bits (1/4096 of full scale) |
Output ranges | Unipolar: 0-10V, 0-5V Bipolar: ±10V, ±5V, ±2.5V |
Output current | ±5mA max per channel |
Settling time | 4µS max to ±1/2 LSB |
Relative accuracy | ±1 LSB channel to channel |
Nonlinearity | ±1 LSB, monotonic |
Digital I/O J | J17 Ports A, B, C | 17 EXTTRIG, TOUT1 |
Number of I/O lines | 24 | 2 |
Compatibility | 3.3V and 5V logic levels | 3.3V and 5V logic levels |
Input voltage | Low: 0V min, 0.8V max High: 2.0V min, 4.25V max | Low: -0.3V min, 1.34V max High: 1.74V min, 4.25V max |
Input current | +/-10μA max | +/-1μA max |
Output voltage | Low: 0.0V min, 0.4V max High: 2.9V min, 3.3V max | Low: 0.0V min, 0.7V max High: 2.2V min, 3.1V max |
Output current | Low: 12mA max High: -12mA max | Low: 8mA max High: -8mA max |
Counter/Timers | |
A/D pacer clock | 24 bit down counter 10MHz, 1MHz, or external clock input |
General purpose | 16-bit down counter 10MHz, 100KHz, or external clock input |
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