13. DATA ACQUISITION CIRCUIT OVERVIEW

Helios contains a data acquisition subsystem consisting of A/D, D/A, digital I/O, and counter/timer features. This subsystem is equivalent to a complete add-on data acquisition PC/104 module such as the Diamond Systems DMM-16-AT.

The A/D section includes a 16-bit A/D converter, 16 analog input channels, and a 2048-sample FIFO. Input ranges are programmable, and the maximum sampling rate is 250KHz. The D/A section includes 4 12-bit D/A channels. The digital I/O section includes up to 40 lines with programmable direction. The counter/timer section includes a 24-bit counter/timer to control A/D sampling rates and a 16-bit counter/timer for user applications.

High-speed A/D sampling is supported with interrupts and a FIFO. The FIFO is used to store up to 2048 A/D samples. An interrupt occurs when the FIFO reaches a user-selected threshold. Once the interrupt occurs, an interrupt routine runs and reads the data out of the FIFO. In this way the interrupt rate is reduced by a factor equal to the size of the FIFO threshold, enabling a faster A/D sampling rate and lower software overhead. The circuit can operate at sampling rates of up to 250KHz, with an interrupt rate of only 1KHz.

The A/D circuit uses the default settings of I/O address range 0x280 – 0x28F (base address 0x280) and IRQ 5. These settings can be changed if needed. The I/O address range is changed in the BIOS, and the interrupt level is changed with jumper block J21. The diagram below shows the Helios data acquisition circuit.