14.4.3 Page 1: AutoCalibration Control
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During EEPROM or TrimDAC write operations, the data written to this register will be written to the selected device.
During EEPROM read operations this register contains the data to be read from the EEPROM and is valid after EEBUSY = 0.
The TrimDAC data cannot be read back.
D7-0
Calibration data to be read or written to the EEPROM and/or TrimDAC.
A7-A0
EEPROM / TrimDAC address.
The EEPROM recognizes address 0 – 255 using address bits A7 – A0. The TrimDAC only recognizes addresses 0 – 7 using bits A2 – A0. In each case remaining address bits will be ignored.
This register is used to initiate various commands related to autocalibration.
EE_EN
EEPROM Enable. Writing a 1 to this bit will initiate a transfer to/from the EEPROM as indicated by the EE_RW bit. If both EE_EN and TDACWR are set to ‘1’ then TDACWR is ignored.
EE_RW
Selects read or write operation for the EEPROM:
0 = Write
1 = Read
RUNCAL
Writing 1 to this bit causes the board to reload the calibration settings from EEPROM. If this bit is set to 1, all other bits written to this register are ignored, however the current value of CALMUX is preserved.
CALMUX
Calibration multiplexor enable. The cal mux is used to read precision on-board reference voltages that are used in the autocalibration process. It also can be used to read back the value of analog output 0.
1 = enable cal mux and disable user analog input channels
0 = disable cal mux, enable user inputs
TDACWR
TrimDAC Write. Writing 1 to this bit will initiate a transfer to the TrimDAC addressed by the register at page 1, base+13. (used in the autocalibration process). If both EE_EN and TDACWR are set to ‘1’ then TDACWR is ignored
TDBUSY
TrimDAC busy indicator.
0 User may access TrimDAC
1 TrimDAC is being accessed; user must wait.
EEBUSY
EEPROM busy indicator.
0 User may access EEPROM
1 EEPROM is being accessed; user must wait
CALMUX
Readback of calibration multiplexor enable setting:
1 Enabled.
0 Disabled.
The user must write the key value 0xA5 (binary 10100101) to this register each time after any change in the states of registers bits PG1 and PG0 (base+1 bits 1-0) in order to get access to the EEPROM. This helps prevent accidental corruption of the EEPROM contents. Once the key value is written, access to the EEPROM remains enabled until the page bits are changed.