13.6 Monitor the DACBUSY status bit

DACBUSY = 1 for 10uS while the data in registers 4 and 5 are serially shifted into the D/A chip. After DACBUSY returns to 0 users can write to register 4 and 5. Registers 4 and 5 should NOT be written to while DACBUSY = 1. If updating multiple channels for simultaneous update repeat steps 1 to 6.

Example

D/A is set to +/-5V range. Set channel 1 to 3.000V.

1.Compute D/A code

Using the bipolar mode formula, we compute D/A code = 3V / 5V * 2048 + 2048 = 3276.8.

Round this up to 3277. (Binary value = 1100 1100 1101)

2. Compute LSB and MSB.

LSB = 3277 & 255 = 205 (Binary value = 1100 1101)

MSB = int(3277/256) = 12 (Binary value = 1100)

3. Add channel number to MSB

MSB = 12 + 1 * 64 = 76

4. Check DASIM. For non-simultaneous update DASIM = 0, for latching DASIM = 1.

To update: MSB = MSB & 0xDF

To latch: MSB = MSB + 32

5. Write LSB and MSB to board, enable enhanced features if using latching.

outp(Base + 8, 3); //this is for enabling enhanced features.

Set page bit to 3 outp(Base + 15, 0xA6); //enable enhanced features

outp(Base + 4, LSB);

outp(Base + 5, MSB);

6. Monitor DACBUSY bit, Base + 4 bit 7

while (inp(Base + 4) & 0x80);