19.1 Set Simultaneous Update Mode and/or DAC Resolution

If simultaneous update is desired, the DASIM bit should be set before writing the data to the DAC so that it will not update immediately. Then after all new DAC data is written, the DAC update can be initiated. The DASIM remains in effect until it is changed or a board or system reset occurs.

outp(base+11, inp(base+11) | 0x20); // set bit 5 for simultaneous update

outp(base+11, inp(base+11) & 0xDF); // clear bit 5 for individual update

The standard model of Helios uses a 12-bit DAC, and no resolution setting is required. If a 16-bit DAC is installed in a custom configuration of Helios, the DAMODE bit must be set to tell the FPGA where the DAC MSB data is found when loading the DAC. The DAMODE bit only needs to be set one time at the start of the program.

outp(base+11, inp(base+11) | 0x40); // set bit 6 for 16-bit DAC