17.1 Counter/Timer Features and Configuration Options
Diamond-MM-32DX-AT emulates an 82C54 counter/timer chip, providing 3 16-bit counter/timers.
Counters 1 and 2 are cascaded together to form a 32-bit counter/timer for use as a programmable A/D sampling clock. The output of counter 1 provides the input for counter 2, and the output of counter 2 is fed to the A/D triggering circuit as well as the I/O header J3. If not being used for A/D sampling, these counter/timers may be used for other functions. Counter/timer 0 is always available for user applications.
The inputs of the counter/timers are programmable, and the outputs may be routed to the I/O header under software control. The table below lists the key features of each counter/timer:
Counter/Timer Configuration Options
Counter | Input | Gate | Output |
0 | 10MHz on-board 10KHz on-board Clk 0 / Din 0 (J3 pin 48) | Gate 0 / Din 1 (J3 pin 47) | Ctr 0 Out / Dout 0 (J3 pin 44) |
1 | 10MHz 100KHz | Extgate / Din 2 (J3 pin 46) | Not available to user |
2 | Counter 1 out | Extgate / Din 2 (J3 pin 46) | Ctr 2 Out / Dout 2 (J3 pin 44) Used internally for A/D sampling control |
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